| AMD GPU ISA DOCUMENTATION
Understanding the instruction-level capabilities of any processor is a worthwhile endeavour for any developer writing code for it, even if the instructions that get executed are almost always hidden behind a higher-level language and compiler. If you’re working at that level as most are, the extra understanding you get from knowing exactly how the machine executes will hopefully help you write better code for it.
We’ve been releasing the ISA manuals for our GPUs for a long time now, and they reach all the way back to the venerable Radeon R600 (a GPU which helped usher in the DirectX®10 era back in 2006!)
The main purposes of an ISA are to:
- Specify the language constructs and behavior, including the organization of each type of instruction in both text syntax and binary format.
- Provide a reference of instruction operation that compiler writers can use to maximize performance of the processor.
These ISAs are intended for programmers writing application and system software, including operating systems, compilers, loaders, linkers, device drivers, and system utilities. It assumes that programmers are writing compute-intensive parallel applications (streaming applications) and assumes an understanding of requisite programming practices.
This document describes the environment, organization and program state of AMD “RDNA” Generation devices. It details the instruction set and the microcode formats native to this family of processors that are accessible to programmers and compilers.
The document specifies the instructions (include the format of each type of instruction) and the relevant program state (including how the program state interacts with the instructions).
Some instruction fields are mutually dependent; not all possible settings for all fields are legal. This document specifies the valid combinations.
This ISA builds upon the original “Vega” ISA above.
It includes a useful guide comparing what is new with the “Vega” architecture compared to our older GPUs as there are some key differences. For this latest ISA, you will also be able to see at a glance the new instructions available with the “Vega” 7nm and find out about them in more detail.
The AMD Vega ISA document takes you on a trip through how Vega works in a top-down way, working from how the programs it executes are structured and flow, through the difference between the scalar and vector ALUs, all the way to the correct binary encoding for the instructions so that the specific Vega implementation can read them and execute.
There’s also a handy guide to what’s new in Vega compared to our older GPUs. There are some key differences in Vega compared to prior AMD GPUs, especially around our Rapid Packed Math (RPM) feature in the microarchitecture, so be sure and check that stuff out. Grab the PDF and search for something like
V_PK_FMA_F16 to get a taste of the new instructions.
The documentation is a good complement to the Radeon Graphics Analyzer (RGA) which supports ISA visibility for Vega GPUs.
AMD GCN3 ISA Architecture document describes the environment, organization, and program state of AMD GCN Generation 3 devices which includes Radeon R9 family of devices. It details the instruction set and the microcode formats native to this family of processors that are accessible to programmers and compilers.
Not finding what you need here, or looking for something a bit more niche or historical? You may find what you’re after on AMD’s Developer Documentation pages.
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Radeon GPU Analyzer is an offline compiler and performance analysis tool for DirectX®, Vulkan®, SPIR-V™, OpenGL® and OpenCL™.
Radeon GPU Analyzer (RGA) has support for DirectX12 compute shaders with the command line tool. This mode can generate GCN/RDNA ISA disassembly for your compute shaders, regardless of the physically installed GPU.
This is a Visual Studio® Code extension for the Radeon GPU Analyzer (RGA). By installing this extension, it is possible to use RGA directly from within Visual Studio Code.