AMD “Vega” 7nm Instruction Set Architecture documentation

December 12, 2019

For most developers, it’s always worth understanding the instruction-level capabilities of any processor. Even though the instructions that get executed are usually hidden behind a higher level language and compiler, knowing exactly how things work will hopefully help you to write more optimal code. And that’s where the ISA (Instruction Set Architecture) manuals come in.

We’ve been releasing the ISA manuals for our GPUs for a long time now, and they reach all the way back to the Radeon R600 in 2006. We have had the original “Vega” ISA available for a few years now, but now it is time for us to add the “Vega” 7nm ISA manual to this list.

This ISA builds upon the original “Vega” ISA which takes you on a trip through how the “Vega” architecture works in a top-down way. It includes a useful guide comparing what is new with the “Vega” architecture compared to our older GPUs as there are some key differences. For this latest ISA, you will also be able to see at a glance the new instructions available with the “Vega” 7nm and find out about them in more detail.

Chapters

Here’s what you will find:

Chapter 1 begins the document begins with an overview of the AMD GCN processors’ hardware and programming environment.
Chapter 2 describes the organization of GCN programs.
Chapter 3 describes the program state that is maintained.
Chapter 4 describes the program flow.
Chapter 5 describes the scalar ALU operations.
Chapter 6 describes the vector ALU operations.
Chapter 7 describes the scalar memory operations.
Chapter 8 describes the vector memory operations.
Chapter 9 provides information about the flat memory instructions.
Chapter 10 describes the data share operations.
Chapter 11 describes exporting the parameters of pixel color and vertex shaders.
Chapter 12 describes instruction details, first by the microcode format to which they belong,
Chapter 13 provides a detailed specification of each microcode format.