Part 2 shares a real-world problem of cache invalidation in CPU performance optimization, explaining how different data structures, compilers, and CPUs affect caching behavior and performance, and provides benchmarking and analysis techniques to address these issues.
The AMD RDNA™ 3.5 ISA reference guide is now available! The ISA guide is useful for anyone interested in the lowest level operation of the RDNA 3.5 GPU architecture.
A simple C++ program demonstrating how easy it is to decode instructions using the IsaDecoder API.
A repository of AMD Instruction Set Architecture (ISA) and Micro Engine Scheduler (MES) firmware documentation
This first part introduces the concept of affinity and why its important for achieving better performance on AMD GPU nodes
AMD’s machine-readable GPU ISA specifications are a set of XML files that describe AMD’s latest GPU Instruction Set Architectures (ISAs)
Register pressure of GPU kernels has a tremendous impact on performance. This post provides a practical demo on applying recommendations.
In this third part, we cover additional optimizations to fine tune the performance of the kernel, and introduce temporary files, register pressure, and occupancy.
This post gives an overview of AMD’s open source profiling tools, helping you diagnose bottlenecks and understand how your application is using the hardware.
This post introduces commonly-used memory spaces, identifies what makes each memory space unique, and discusses some common use-cases for each space.
The Game Engineering team – in collaboration with others – has put together an RDNA architecture presentation containing doodles, notes and explanation about the structure of RDNA, how it works, and the differences from our previous architectures.
