AMD GPU architecture programming documentation
A repository of AMD Instruction Set Architecture (ISA) and Micro Engine Scheduler (MES) firmware documentation
A repository of AMD Instruction Set Architecture (ISA) and Micro Engine Scheduler (MES) firmware documentation
This presentation introduces a novel algorithm for PC and console developers to efficiently generate sparse distance fields in real-time.
Our one-stop resource for getting great AMD RDNA™ performance on Vulkan® and DirectX®12 APIs!
This talk introduces compute shaders, explaining ideas from a software and hardware perspective, as well as considerations when writing compute shaders.
This presentation by one of our engineers at GIC 2020 provides an introduction to the graphics pipeline.
To accompany the launch of the AMD Radeon™ RX 6000 series graphics cards, we are excited to share new content and updates to GPUOpen with you.
AMD RDNA™ 2 is the fantastic architecture from AMD Radeon™ that underpins the RX 6000 series graphics cards.
This video will take you from the original source code down to the RDNA ISA. It covers control-flow, bindless resource access and scalarization, along with DXC, instruction selection, scheduling, and register allocation for the RDNA instruction set.